The proliferation of new integrated circuit chip technologies in electronic devices has changed the requirements of printed circuit substrates in the electronics industry. In particular, the use of leadless ceramic chip carriers results in 3 to 9 times higher packing density of operating components and the consequently more severe thermal management problems than have existed previously. Leadless ceramic chip carriers are designed to be surface mounted. Solder connecting the device to the printed circuit board is both an electrical and a mechanical connection. When these chip carriers are mounted on conventional circuit boards such as constructed of epoxy glass composites, the mismatch in thermal expansion coefficients of the chip carrier and the board is significant. The chip carrier has a linear thermal coefficient of expansion (CTE) of about 6.4 ppm/.degree.C. over the temperature range of -55.degree. C. to 200.degree. C. while the epoxy glass has a CTE of about 16 ppm/.degree.C. over the same temperature range. This high mismatch results in solder-joint stress failure during thermal cycling.
Moreover, the higher packing density achievable with chip carriers generates more heat per unit area of printed circuit board than has been encountered heretofor. This heat must be dissipated to prevent high temperature failures in the devices. Conventional epoxy glass printed circuit board materials are thermal insulators and are not suitable in high packing density applications without separate provision for heat dissipation.
Several attempts to solve the problem have been made. Workers in the art have used a copper/iron-nickel alloy/copper sandwich construction as described in "Implementation of Surface Mount Technology in High Reliability Products", G.L. Horton, presented at National Electronic Packaging and Production Conference, NEPCON WEST, February 1987, Anaheim Convention Center, Anaheim, CA and in "Military Moves Headlong Into Surface Mounting", Special Report by Jerry Lyman, Electronics, July 10, 1986. In this configuration the CTE of the composite sandwich construction can be made to match the CTE of the leadless ceramic chip carrier, i.e. around 6.4 ppm/.degree.C. The iron-nickel alloy (Invar, also sold as NILO.TM. 36 by Inco Alloys International, Inc.) in the center of the sandwich has a CTE of 1.6 ppm/.degree.C. over the temperature range of -18.degree. C. to 175.degree. C. (unless otherwise stated thermal expansions mentioned hereinafter and in the claims are over this range of temperature).
However, this sandwich construction has one major drawback. While the copper has an excellent thermal conductivity of about 400 Watts per meter degree Kelvin (W/m .degree.K.) the Invar has a thermal conductivity of only around 9.6 W/m .degree.K. This means that while the thermal conductivity along the strip is good, the conductivity through the strip is very poor. Thus, the sandwich construction of copper/Invar/copper is not overly advantageous in advanced circuit board design.
Another approach to producing a composite with controlled expansion properties and improved thermal conductivity through the sheet is described and claimed in U.S. Pat. No. 4,283,464 (the '464 patent). The '464 patent teaches having a low CTE plate with holes which are filled with a material which is highly thermally conductive such as copper or silver. This patented development has two major problems. Firstly, the surface of plate has a mixture both high and low thermal conduction spots, i.e. the heat removal rate will vary from about 9 W/m .degree.K. on the material of low CTE to about 397 W/m .degree.K. on the copper. Since the smallest practical size of the holes which can be drilled or punched in the sheet of low CTE material is about 1.0 to 1.5 mm, which is a large dimension relative to the size of the components to be mounted thereon, the non-homogeneous heat transfer will result in unacceptable thermally induced strains or temperature gradients in these devices Secondly, the '464 patent alleges use of a KOVAR.TM. (alloy 42) material with a CTE of around 5 to 6 ppm/.degree.C. to match the CTE of the device to be cooled. However, the author has not realized or has not constructed a device, and measured the CTE of the final devices or he would find, as is proven hereinafter, that the presence of the copper in the holes will exert a high expansion force on the device as it is heated, and the average CTE of the device will be substantially higher than the CTE of the KOVAR (alloy 42) plate. Thus, the device described in U.S. Pat. No. 4,283,464 would not have the properties as described.